Aces High Bulletin Board
General Forums => Hardware and Software => Topic started by: AKDejaVu on December 04, 2001, 03:35:00 PM
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http://www.theregister.co.uk/content/3/23174.html (http://www.theregister.co.uk/content/3/23174.html)
Here's a technology you will be hearing more about. I guarantee it.
AKDejaVu
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That press release is a little vague for my tastes. Do you know if this is the same type of process currently employed using SOI techniques to achieve the same thing? Or is it something different? (If it's using existing fabs then it is probably different than what I'm aware of... )
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Its totally different than SOI.
Basically, two seperate chips are made then turned to face each other and pressed together to form a bond. Basically, it allows for support chips to be bonded directly to the main processor and for the remainder of the main processor to be built around it (and above it).
I dunno if an aplication has been clearly defined in the processor market... but the possibilities are pretty extraordinary.
AKDejaVu
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Interesting....
A natural extension to "flip chip" technology which uses the same concept to eliminate wire-bonding.
I agree, it could produce some very high performance low cost hardware.
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This does not eliminate wire bonding. It eliminates lengthy in-chip interconnects. Wirebonding is simply a means to get the signal from the processor to the pins. Flip-chip is pretty much the same thing. That's the cool thing about it, you can do 3d manufacturing and still use the existing packaging process. Of course, this (http://www.intel.com/pressroom/archive/releases/20011008tech.htm) would be much better :D
All this really provides is a means to hide things like cache inside of the processor, without needing to increase the footprint of the chip.
AKDejaVu
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Ahhhh..... Maybe my terminology is incorrect... :D
We own a company in Phoenix CMC Wireless (http://www.cmcwireless.com) who make an ALN package for a flip chip company. I asked the R&D people there a few weeks ago what was the advantage of "flip chip" technology. They said that by placing the chip on its back with direct contacts against the surface of the board, it eliminated the legs on the chip (they called it the wire bonding process) and resulted in improved performance with a reduction in manufacturing cost.
What is the process of attaching the legs called then?
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Flip-chip and wirebond are types of packaging. With wirebond, we were limited to how many bond pads we could put around the outside perimeter on top of the processor. Flip-chip enabled bonding throughout the entire top surface of the processor (not just around the edges). The newly announced process will take a chip and actually build the packaging around it with copper interconnects... allowing for much smaller dimensions (more bonds) and less resistivity. ....these are all packaging methodologies.
The 3d process being refered to in the initial link is considerably prior to packaging. Its actually part of the chip building process.
AKDejaVu
[ 12-06-2001: Message edited by: AKDejaVu ]
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It's amazing how quickly this development advances on a daily basis.
I visited a company last week who were into organic technologies for computers. Afterwards, I had this vision of people growing their own systems in the backyard. :D
Thanks for the info.....