I don't remember where I read that but do remember reading it at several sources as I was preparing to OC my CPU. It makes sense when you think about synching the CPU and RAM in that each core operates with relative indepencence. As I'm sure you're aware there are times where a single core is taking almost the entire load. I see this regularily on my system monitor. My CPU is an E6750 2.66 Ghz Core2Duo OC'd to 3.2 Ghz on a 1600 FSB linked and synched to 4 Gb DDR2 800 Kinston HyperX (4-4-4-12). Unfortunately I'm running 32 bit XP Pro and only see 3.25 Gb of my RAM (eVGA 8800 GTS G92 512 Mb GPU) but it does everything I need it to do so I'm happy.
Okay, so I just did a little reading myself and it cleared up a LOT:
The reason the FSB has a multiplier of 4 is because it sends data 4 times a data cycle. If you imagine a sine curve (what a clock cycle looks like on a graph), the FSB will send a signal at the top, bottom, and every time it crosses the x-axis, which equates to a total of 4.
This means that even though a processor may be multi-core'd, the FSB is still considered "Quad Pumped" (aka QDR or Quad Data Rate) because when the data is sent from the bus is independent of the number of cores in operation.
So basically, the reason we want to match the system speed (FSB/4) to the real RAM speed (Mhz/2) is because in a Dual Channel memory system, the RAM will effectively pick up on all 4 data cycles of the FSB (each channel will pick up 2 of the 4).
FSB sends out 4 bits (QUAD DATA RATE) of data in one cycle (200Mhz x 4 = 800)
-DDR (DUAL DATA RATE) channel one picks up 2 bits of data in one cycle (200Mhz x 2 = 400)
-DDR channel two picks up the other 2 bits of data in one cycle (200Mhz x 2 = 400)
And if I'm understanding correctly, in a single channel memory situation, you want your true RAM speed to match the FSB speed/2 because:
FSB sends out 4 bits of data in one cycle (200Mhz x 4 = 800Mhz)
-Single DDR channel picks up 2 bits in one cycle (400Mhz x 2 = 800Mhz)
-Single DDR channel picks up 2 bits in another cycle (400Mhz x2 = 800Mhz)
So effectively, by the time the FSB has finished it's cycle, the memory has gone through 2 cycles to compensate for only being able to pick up 2 bits at a time. Kind of interesting stuff, isn't it?
However, now that the memory controllers built into all the new Intel chips, Core i3', i5, i7, and i9, (which AMD has been doing for some time under the name of Hyper Transport) my understanding is that this will all go out the window, and ultimately faster RAM means better performance.