Unfortunately it's just not that simple. 32 bit addressing in the PC allows addressing up to just over 4 Gigabytes of RAM (note that RAM can also include hard drive space) at the same time, however that's not the end of the story. x86 processors also use a technique called segmentation which allows multiple chunks (16383 to be exact) of 4 GB each to be accessed. That theoretically allows any modern x86 processor to address up to a total of 64 Terabytes. (x86 processors from the Pentium up also support what is known as PAE, or paging address extension, which allows them to use 36 bit addressing (64 GB chunks), but they take a large performance hit when doing so.)
Where the advantage of a 64 bit processor comes into play is that they would be capable of accessing more than 4 GB at the same time. This can deliver performance advantages to applications that work with very large amounts of data. A 64 bit processor is also capable of performing operations on 64 bits of data at a time, which (neglecting a LOT of things) allows them to do twice the "work" in the same amount of time for a similar 32 bit processor running at the same clockspeed. (When I say "neglecting a LOT of things" that means not taking into account architectural differences between CPUs, memory bandwidth, required precision,SIMD instructions, etc, etc.)
AMD's new Athlon 64, Athlon 64 FX, and Opteron have both 32 bit and 64 bit modes. In 64 bit mode they can access more than 4 GB of memory at the same time, but not the theoretical 2^64 (18446744073709551616) bytes. I believe AMD implemented support for up to 64 GB of physical RAM.
Along with the change to 64 bit support, AMD has also added the following compared to the current Athlon XPs:
On die memory controller - basically this greatly reduces the amount of time the processor has to wait before receiving data from RAM. This is the primary improvement over the Athlon XP, and it is a big one. If you are familiar with what is called a "front side bus" (FSB) on current processors, which is the speed at which they communicate with their memory controller consider that the new AMD CPUs will have a front side bus frequency that is proportional to their CPU clockspeed. (Which means that faster CPUs have a correspondingly faster FSB. This will allow the new AMD CPUs to scale in performance faster for a given rise in MHz compared to other CPUs.)
SSE2 instruction support - SSE2 instructions are special instructions that Intel added to the P4. Since the upcoming AMD cpus can now use them, it means they will gain in performance in applications currently optimized for the P4.
Improved branch prediction - Branch prediction allows a processor to, in effect, guess what data is will need in the future and prefetch it into the CPUs L2 cache. If the CPU guesses right, it doesn't have to wait to get the data from RAM. If it guesses wrong, it simply discards the prefetched data from the L2 cache.
Increased L2 cache size - The Opteron has a 1 MB L2 cache, vs 256 or 512 kB on the Athlon XP and 256 or 512 kB on the P4. A cache is basically memory on the CPU itself that runs at the speed of the CPU. In general, the larger the amount of cache that a processor has, the better it will perform. (Certain applications are more sensitive to cache size than others.) AMD does plan to make a "budget" version of the Athlon 64 with 256 kB of L2 cache in the future.
There are some other minor improvements as well.
